Unterschiede
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Beide Seiten der vorigen Revision Vorhergehende Überarbeitung | Nächste ÜberarbeitungBeide Seiten der Revision | ||
artikel:ipc:mac7116 [Mon. 01.04.2019 04:00] – go4it | artikel:ipc:mac7116 [Mon. 01.04.2019 04:11] – go4it | ||
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+ | |||
+ | ==== External Interface Module (EIM) Configuration Registers ==== | ||
+ | |||
+ | Address range: 0xFC00 8000 – 0xFC00 BFFF | ||
+ | |||
+ | ==== CFM Flash Configuration Field ==== | ||
+ | |||
+ | ^ Address Offset from PROGRAM FLASH BASE ^ Size ^ Function ^ Factory Default ^ | ||
+ | | 0x0400 – 0x0407 | 8 | Backdoor Comparison Key | 0xFFFF_FFFF_FFFF_FFFF | | ||
+ | | 0x0408 – 0x040B | ||
+ | | 0x040C – 0x040F | ||
+ | | 0x0410 – 0x0413 | ||
+ | | 0x0414 – 0x0417 | ||
+ | | 0x0418 | ||
+ | | 0x0419 | ||
+ | | 0x041A | ||
==== CFM Registers and values ==== | ==== CFM Registers and values ==== | ||
- | === CFMCLKD === | + | Address Range: 0xFC0F 0000 – 0xFC0F 3FFF |
+ | |||
+ | === CFM Clock Divider Register (CFMCLKD) === | ||
- | * Memory Address: | ||
^ Register | ^ Register | ||
- | | CFMCLKD | 0xFC0F0002 | + | | CFMCLKD | 0xFC0F 0002 | 8 Bits | |
+ | The CFMCLKD register is used to control the period of the clock used for timed events in program anderase algorithms. All CFMCLKD register bits are readable while bits [6:0] are write once and bit 7 is notwritable. | ||
+ | |||
+ | **The CFMCLKD register bits PRDIV8 and DIV must be set with appropriate values before programming or erasing the CFM Flash memory.** | ||
- | ==== CFM-Command "Mass Erase Flash" (0x41) | + | === CFM-Command "Mass Erase Flash" (0x41) === |
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- | |||
- | === CFM Clock Divider Register (CFMCLKD) === | ||
- | |||
- | The CFMCLKD register is used to control the period of the clock used for timed events in program anderase algorithms. All CFMCLKD register bits are readable while bits [6:0] are write once and bit 7 is notwritable. | ||
- | |||
- | **The CFMCLKD register bits PRDIV8 and DIV must be set with appropriate values before programming or erasing the CFM Flash memory.** | ||